October 12, 2015
October 12, 2015
In this post we describe the design principles, the basic structure and main performance data for a new ASIC modem, SatixFy’s SX-3000, fully supporting the newly published DVB-S2X standard. This DVB-S2 extension standard provides an improvement over existing standards in all aspects of satellite operation and the chip enables its usage over a broad range of applications. The SX-3000 is designed around a SoC, which includes several DSP’s and general purpose processors, supported by special purpose hardware designed to accelerate the main functions along the data path. This design enables full support of the standard as well as a large degree of flexibility that make it future-proof, in the sense that it facilitates the introductions of new algorithms, varying parameters, and even different waveforms.
The SDR forum defines software defined radio as Radio in which some or all of the physical layer functions are Software Defined. Obviously, there are many benefits to SDR, especially, if implemented on an ASIC. Several products can be developed on the same hardware platform (ASIC or a product based on the ASIC), As a result, the cost and development time of a new product is reduced as well as the logistical effort. SDR also enables over-the-air new features updates and bug fixes. The figure below depict SDR radio functional blocks.
In the satellite industry, there are several specific reasons for SDR. For example:
3. New Applications are rising, with new requirements. For example:
4. Proprietary solutions:
The SX-3000 ASIC is an SDR ASIC designed for the satellite communication industry. In this paper, we describe the main architecture and parameters of the chip and show some examples how to use it for some typical applications.
A typical software radio implementation is a combination of several signal path HW blocks with DSP algorithms implemented on the 3 CEVA DSPs. Typical signal paths to and from the DSP subsystem for the receive and the transmit paths respectively.
The SX-3000 ASIC modem includes hierarchical modulation receiver. After the base layer is demodulated and decoded, it is re-modulated, multiplied by the estimated channel and subtracted from the received signal so an upper (enhancement) layer can be decoded.
Figure 8 shows the implementation of an iterative co-channel interference cancellation. Tentative decision or soft decision (LLRs) from one channel are iteratively fed back to the equalizer of the second channel and so on.
The figure below shows the implementation of an inter-sat interference cancellation. Up to 4 Low Noise Blocks (LNBs), outputs are combined with complex weights computed by the DSP sub-system. This scheme creates a simple beam former that directs the beam to the maximal SNR point.
Many additional modem functions and features are implements in the SX-3000 which are discussed in other contexts. These will be presented in future posts.
The SX-3000 is a cost effective flexible platform for implementation of a large variety of high-performance satellite communication systems. It is supplied with a tested implementation of the full (with all the options) DVB-S2X standard at 500 Msymbols/sec both ways and an RCS2 modulator. The three powerful vector DSPs plus several fast, generic and programmable HW blocks enable the implementation of state of the art technologies that until now have been difficult to implement at high rates and large quantities.