Be part of a dynamic and motivated verification team, taking part in developing from scratch a state of the art Satellite SoC through the full life cycle: from design to production. The chip includes complex digital and analog modules such as high speed signal processing, communication sub-system, computation sub system and more.
- Responsible for various innovative MODEM block(s) level verification using state of the art verification technologies.
- Apply advanced techniques to achieve verification with the highest quality, productivity, and time-to-market.
- Define and develop verification test plans, test benches, protocol monitors, and high-coverage stimulus vectors.
- Active role defining and implementing advanced verification flows and techniques.
- Working closely with Satixfy architecture, software and design teams ensuring correct implementation.
- At least 3 years of hands on verification experience (block level and/or SoC) with SystemVerilog, UVM and/or Specman.
- Hands on with design flows and methodologies used for advanced verification.
- Understanding of overall verification methodologies.
- Background in networking IPs and SoC architecture.
- Understanding of verification and design practices.
- Scripting and programming experience using several of the following: Perl, Python, Verilog, System Verilog, UVM, DPI and C/C++.
- Clear sense of urgency and a “can do” attitude. Effective teamwork and collaboration skills.
- Self-learning capabilities, adapt to changes and study new technical fields.
B.Sc/M.Sc in Electrical or Computer Engineering or Computer Science.