Careers
SatixFy's Careers
Analog Layout Engineer
Be part of a dynamic and motivated multi-national team, taking part in developing a state of the art Satellite SoC through the full life cycle: design to production. The chips include complex digital and analog modules. Some of the products are part of the next generation radiation hardened satellite modems. You will have access to best in class EDA design tools and will be working in leading edge process technologies.
- Hands-on experience in custom analog layout with working knowledge on deep sub-micron CMOS (28nm and lower preferred)
- Analog layout of high data converters, SERDES, and supporting circuitry for complex SoC, VLSI devices and Test Chips
- Working hand in hand with the design team on implementation and verification
- Collaborate with design team on block and top-level floor planning
- Top-level layout integration and verification, and schedule management
- Integration with system level design
- Jointly with management, build your career development and growth opportunities
Required Skills:
- High proficiency in Cadence and Mentor Graphics layout / verification tools and interpretation of verification reports
- Familiarity with deep sub-micron (28nm or below) process technologies, SOI and FinFet a plus
- Experience in Cadence tool flow
- Excellent written and verbal communication
Education & Experience
- 5+ years of experience in relevant layout design
- Bachelor’s degree in Electrical Engineering or equivalent preferred
Be part of a dynamic and motivated multi-national team, taking part in developing a state of the art Satellite SoC through the full life cycle: design to production. The chips include complex digital and analog modules. Some of the products are part of the next generation radiation hardened satellite modems. You will have access to best in class EDA design tools and will be working in leading edge process technologies.
- Hands-on experience in custom analog layout with working knowledge on deep sub-micron CMOS (28nm and lower preferred)
- Analog layout of high data converters, SERDES, and supporting circuitry for complex SoC, VLSI devices and Test Chips
- Working hand in hand with the design team on implementation and verification
- Collaborate with design team on block and top-level floor planning
- Top-level layout integration and verification, and schedule management
- Integration with system level design
- Jointly with management, build your career development and growth opportunities
Required Skills:
- High proficiency in Cadence and Mentor Graphics layout / verification tools and interpretation of verification reports
- Familiarity with deep sub-micron (28nm or below) process technologies, SOI and FinFet a plus
- Experience in Cadence tool flow
- Excellent written and verbal communication
Education & Experience
- 5+ years of experience in relevant layout design
- Bachelor’s degree in Electrical Engineering or equivalent preferred